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 HTMOSTM High Temperature Products
Advance Information
HIGH TEMPERATURE P COMPATIBLE 12-BIT A/D CONVERTER
FEATURES
* Specified Over -55 to +225C * Includes On-Chip Clock, Reference, P Interface and Sample/Hold * 11-Bit Linearity * Industrial Process Control * 10 s Maximum Conversion, Including Acquisition * Nuclear Reactor * Hermetic 28-Lead Ceramic DIP * Electric Power Conversion * Heavy Duty Internal Combustion Engines
HT574
APPLICATIONS
* Down-Hole Oil Well * Avionics * Turbine Engine Control
GENERAL DESCRIPTION
The HT574 is a general purpose, 12-bit successive approximation A/D converter intended for applications with an extremely wide operating temperature range. Fabricated with Honeywell's dielectrically isolated high temperature (HTMOSTM) process, it is designed specifically for severe high-temperature applications. The HT574 includes a switched capacitor, digital-to-analog converter, internal reference, comparator, successive approximation register, sample and hold, oscillator and architecture which allows it to be used with minimal external components. Tristate output buffers and digital control pins are also provided for microprocessor interfacing. Analog input signal ranges of 0 to +10V, 0 to +20V, or 5V may be selected from the internal resistor scaling network. The HT574 provides 12-bit conversions in 10s over the entire -55 to +225C temperature range. Typically, parts will operate up to +300C for a year, with derated performance. All parts are burned in at 250C to eliminate infant mortality.
28-LEAD PACKAGE
D C
All dimensions in inches
Right Reading on Lid Ceramic Body 1
E eA A b b2 C D E e eA L Q S1 S2 0.175 (max) 0.018 0.002 0.050 (typ) 0.010 to 0.002 1.400 0.014 0.594 0.010 0.100 0.005 0.600 0.010 0.125 to 0.175 0.050 0.010 0.005 (min) 0.005 (min)
S2 A L b2 S1 b (width) e (pitch) Q
Solid State Electronics Center * 12001 State Highway 55, Plymouth, MN 55441 * (800) 323-8295 * http://www.ssec.honeywell.com
HT574
FUNCTIONAL DIAGRAM
28 STS
12_N8 NCS Ao R_NC CE
2 3 4 5 6
TIMING & CONTROL
OSC
VREF_OUT (5.0V)
8
REF
VBG
4-BIT WORD
27 26 25 24
DB11 MSB DB10 DB9 DB8
VTRIM
1
VREF_IN (5.0V)
10
2.5K VREF = 5V
TRI STATE OUTPUT BUFFERS
COMP
23
DB7 DB6 DB5 DB4
4-BIT WORD
20V_IN
14
12-BIT CAPACITOR DAC (0 TO 5V)
10K
12-BIT SAR
22 21 20
10V_IN
13 5K
19
DB3 DB2 DB1 DB0 LSB
4-BIT WORD
7 9 15 1 +10V 10F//0.1F +5V 1F
18 17 16
5K BIP_OFF 12
PINOUT DIAGRAM
NAME
1 2 3 4 5 6 7 8 9 10 11
FUNCTION
Digital Supply (5V) Data Mode Select (1 = 12 bits; 0 = 8 bits) Chip Select (Active Low) Byte Size Select Read/Convert (1 = Read; 0 = Convert) Chip Enable (Active High) Analog Supply (10V) Reference Output (5 V) Analog Ground Reference Input Trims Vref-out Bipolar Offset 10 Volt Analog Input 20 Volt Analog Input Digital Ground 12-Bit Digital Output (DB11 = MSB, DB0 = LSB) Status
VLOGIC (+5V) 12_N8 NCS Ao R_NC CE VDD (+10V) VREF_OUT AGND VREF_IN VTRIM
STS 28 DB11 27 DB10 26 DB9 25 DB8 24 DB7 23 DB6 22 DB5 21 DB4 20 DB3 19 DB2 18 DB1 17 DB0 16 DGND 15
VLOGIC 12_N8 NCS Ao R_NC CE VDD VREF_OUT AGND VREF_IN VTRIM BIP_OFF 10V_IN 20V_IN DGND DB0:11 STS
12 BIP_OFF 13 10V_IN 14
20V_IN
2
HT574
DC ELECTRICAL CHARACTERISTICS
P arame te r Resolution Integral Non-Linearity (INL) Differential Non-Linearity (DNL) Unipolar Offset Error Bipolar Offset Error Full Scale Calibration Error (1) Temperature Coefficients Unipolar Offset Bipolar Offset Full Scale Calibration Power Supply Rejection +9.0VV +4.5V(1) Can be adjusted by tying VTRIM to external resistor and VREF_OUT or VSSA. (2) Available for external loads, external load should not change during conversion. Temperature ranges = -55 to +225C, VDD = 10.0V 10% Typical @ +25C, Vlogic = +5V, unless otherwise specified
Conditions Tmin to Tmax Tmin to Tmax Adjustable to zero Adjustable to zero No adjustment at +25C, Tmin to Tmax With adjustment at +25C, Tmin to Tmax Using internal reference, Tmin to Tmax
Typ
Min
Max 12 1 1 2 10
Units Bits LSB LSB LSB LSB % of FS % of FS
0.8 0.5 2 (5) 4 (10) 20 (50)
LSB (ppm/C) LSB (ppm/C) LSB (ppm/C) LSB LSB
Max change in full scale calibration 2 0.5 -5 0 0 Temperature coefficient = 100ppm/C 3.3 13.3 2.64 10.64 +4.5 +9 1 7 VDD = 10V, VLOGIC = 5 V 75 5 4.965 3.96 15.96 +5.5 +11 3 9 105 5.035 8 K k V V mA mA mW V mA +5 +10 +20
V V V
3
HT574
DIGITAL CHARACTERISTICS
Parameter Logic Inputs (CE, NCS, R_NC, Ao, 12_N8) Logic "1" Logic "0" Current Capacitance Logic Outputs (DB11-DBO, STS) Logic "0" Logic "1" Leakage Capacitance (ISink = 1.6mA) (ISource = 500A) (High Z state, DB11-DBO only) 0.1 5 +2.4 -5 +5 +0.4 V V A pF 0 to +5.5V input 0.01 5 2.4 -0.5 5.5 +0.8 +5 V V A pF Conditions
Temperature ranges = -55 to +225C, VDD = 10.0V 10% Typical @ +25C, Vlogic = +5V, unless otherwise specified
Typical
Min
Max
Units
READ MODE AC TIMING CHARACTERISTICS
Symbol tDD tHD tHL tSSR tSRR tSAR tHSR tHRR tHAR tHS Parameter Access Time from CE Data Valid after CE Low Output Float Delay NCS to CE Setup R_NC to CE Setup Ao to CE Setup NCS Valid after CE Low R_NC High after CE Low Ao Valid after CE Low STS Delay after Data Valid
Temperature ranges = -55 to +225C, VDD = 10.0V 10% Typical @ +25C, Vlogic = +5V, unless otherwise specified
Conditions (1)
Typical
Min
Max 150
Units ns ns
25 150 0 0 50 0 50 0 0 0 0 50 300 1000
ns ns ns ns ns ns ns ns
(1) Time is measured from 50% level of digital transitions. Tested with a 100pF and 3k load for high impedance to drive and tested with 10pF and 3k load for drive to high impedance.
4
HT574
CONVERT MODE TIMING CHARACTERISTICS
Symbol tDSC tHEC tSSC tHCS tSRC tHRC tSAC tHAC tC Parameter STS Delay from CE CE Pulse Width NCS to CE Setup NCS Low during CE High R_NC to CE Setup R_NC Low during CE High Ao to CE Setup Ao Valid during CE High Conversion Time 12-Bit Cycle 8-Bit Cycle Including Acquisition Tmin to Tmax Tmin to Tmax 50 50 50 50 50 0 50 10 7.2 Conditions (1)
Temperature ranges = -55 to +225C, VDD = 10.0V 10% Typical @ +25C, Vlogic = +5V, unless otherwise specified
Typical
Min
Max 200
Units ns ns ns ns ns ns ns ns s s
(1) Time is measured from 50% level of digital transitions. Tested with a 100pF and 3k load for high impedance to drive and tested with 10pF and 3k load for drive to high impedance.
CONVERT MODE TIMING DIAGRAM
READ MODE TIMING DIAGRAM
CE
CE tSSC NCS tHEC
NCS
tSSR
tHSR
tHRR
tSRC R_NC tHSC
R_NC
tHRC
tSRR Ao
Ao tSAC tHAC
tSAR
tHAR
STS tDSC tC
STS
High Impedance DB11-DB0
High DB11-DB0 Impedance tDD
tHS Data Valid
tHD
tHL
5
HT574
STAND ALONE MODE TIMING CHARACTERISTICS
Symbol tHRL tDS tHDR tHS tHRH tDDR Parameter Low R_NC Pulse Width STS Delay from R_NC Data Valid after R_NC Low STS Delay after Data Valid High R_NC Pulse Width Data Access Time 25 300 150 150 1000
Temperature ranges = -55 to +225C, VDD = 10.0V 10% Typical @ +25C, Vlogic = +5V, unless otherwise specified
Conditions (1)
Typical
Min 50
Max
Units ns
200
ns ns ns ns ns
SAMPLE AND HOLD CHARACTERISTICS
Parameter Acquisition Time Aperture Uncertainty Time Conditions (1)
-55 to 225C, VDD = +10V, VLOGIC = +5V Unless otherwise specified
Typical
Min
Max 1.26
Units s ns
20
(1) Time is measured from 50% level of digital transitions. Tested with a 100pF and 3k load for high impedance to drive and tested with 10pF and 3k load for drive to high impedance.
STAND ALONE MODE TIMING LOW PULSE FOR R_NC
tHRL R_NC
STAND ALONE MODE TIMING HIGH PULSE FOR R_NC
R_NC
tDS
tHRH
tDS
STS tC tHDR tHS
STS tDDR tHDR
tC
Data Valid DB11-DB0
Data Valid
High-Z DB11-DB0 Data Valid
High-Z
6
HT574
UNIPOLAR INPUT CONNECTIONS
100K -15V
+15V
VIN (0 TO 20V) Range
14 10K 13 5K
100K
VIN (0 TO 10V) Range
BIP_OFF
12 5K
VIN (0 TO 5V)
100
VREF_OUT
8
REF OUT = 5V
VBG REF
11
VREF_IN
10
2.5K
VREF = 5V
VTRIM
Note: If no offset adjustment is required, BIP_OFF can be tied directy to AGND (0 volts).
BIPOLAR INPUT CONNECTIONS
Open
14
VIN (5V) Range
13
10K
5K BIP_OFF 12 5K
VIN (0 TO 5V)
VREF_OUT
8
REF OUT = 5V
VBG REF
11
VREF_IN
10
2.5K
VREF = 5V
VTRIM
7
HT574
TRUTH TABLE FOR HT574 CONTROL
Case 1 2 3 4 5 6 7 8 9 10 11 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 CE 0 X NCS X 1 0 0 R_NC X X 0 0 0 0 12_N8 X X X X X X X X 1 0 0 A0 X X 0 1 0 1 0 1 X 0 1 None None Initiate 12 Bit Conversion Initiate 8 Bit Conversion Initiate 12 Bit Conversion Initiate 8 Bit Conversion Initiate 12 Bit Conversion Initiate 8 Bit Conversion Enable 12 Bit Output Enable 8 MSB's Only Enable 4 LSB's + 4 Trailing Zero's Operation
ABSOLUTE MAXIMUM RATINGS (1)
VDD to Analog Common ........................................................................................................................... 0V to +12.5V VLOGIC to Digital Common ........................................................................................................................... 0V to +7V Analog Common to Digital Common ....................................................................................................................... 1V Control Inputs (CE, NCS, 12_N8, Ao, R_NS) to Digital Common............................................ -0.5V to VLOGIC +0.5V Analog Inputs (VREF_IN, BIP_OFF, 10V_IN) to Analog Common .................................................................... 12.5V 20V_IN to Analog Common .................................................................................................................................. 24V VREF_OUT ............................................................................................................... Indefinite Short Circuit to Ground Power Dissipation ........................................................................................................................................... 1000mW Storage Temperature .............................................................................................................................. -65 to +325C Lead Temperature (Attachment, 10 sec.) ............................................................................................................ 355C ESD Protection .................................................................................................................................................... 2000V
(1) Stresses in excess of those listed above may result in permanent damage. These are stress ratings only, and operation at these levels is not implied. Frequent or extended exposure to absolute maximum conditions may effect device reliability.
To learn more about Honeywell Solid State Electronics Center, visit our web site at http://www.ssec.honeywell.com
Honeywell reserves the right to make changes to any products or technology herein to improve reliability, function or design. Honeywell does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Helping You Control Your World
900177 Rev. B 4-98
8


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